Samsung figures out key to faster, more power efficient DRAM

Samsung is in full gloat mode over having begun mass producing what it says is the industry's first 10-nanometer class, 8-gigabit DDR4 DRAM chips, along with full-fledged modules that use the new chips.

Be that as it may, getting below 20nm isn't a piece of cake, hence why Samsung can make an announcement like this and competitors like Micron can't. Samsung had a bit of an advantage in that it's already using 10nm-class MLC NAND flash memory chips on some of its solid state drives, but it's decidedly more difficult to get to the same place with DRAM chips.

The challenge with DRAM is that each cell requires a capacitor and transistor that go together, typically with the capacitor on top of the area where the transistor is at. To make things even more difficult, 10nm-class DRAM requires that Samsung stack very narrow cylinder-shaped capacitors on top of a just a few dozen 1nm-wide transistors, Samsung explains.

Samsung overcame the technical challenges by tweaking the quadruple patterning lithography that it uses for the aforementioned NAND chips. As an added bonus, this method allows Samsung to use its existing photolithography equipment.

What does all this mean for end users? Along with other technical improvements Samsung made en route to 10nm-class DRAM, Samsung claims a 30 percent boost in performance compared to 20nm-based DRAM, while consuming 10-20 percent less power. The latter won't matter much to home consumers, though for large data centers, the power savings can add up (and presumably mean less heat).

Samsung will be introducing a variety of 10nm-class DRAM modules, everything from 4GB solutions for laptops to 128GB kits for enterprise servers.

Paul has been playing PC games and raking his knuckles on computer hardware since the Commodore 64. He does not have any tattoos, but thinks it would be cool to get one that reads LOAD"*",8,1. In his off time, he rides motorcycles and wrestles alligators (only one of those is true).