AMD wants to patent a new DDR5 memory standard with double the bandwidth but we're not expecting to see it in PCs any time soon
12.8 Gbps of raw bandwidth, but will the industry adopt it?

An AMD patent application for a new spin on DDR5 PC memory has been spotted. The so-called high-bandwidth dual inline memory module or HB-DIMM is designed to boost memory bandwidth courtesy of pseudo channels, buffer chips and intelligent signal routing. It looks very fancy, but we'll take some convincing it'll appear in PCs any time soon.
Uncovered by Tech4Gamers, the AMD patent application explains that modern computing platforms have ever greater memory bandwidth requirements.
"Because the memory bandwidth required for applications such as high-performance graphics processors and servers, which have multiple cores and a corresponding increase in bandwidth-per-core requirement, are outpacing the roadmap of bandwidth improvements for DDR DRAM chips, improved DIMM architectures are needed to meet such requirements with current DDR chip technologies such as DDR5," the filing says.
The answer to that problem? "The high-bandwidth DIMM (HB-DIMM). This approach seeks to use the benefits of the high-bandwidth memory (HBM) format in a DIMM form-factor."
Each HB-DIMM is primarily composed of memory chips and buffer chips. "The data buffer chips are coupled to respective sets of the memory chips and transmit data from the memory chips over a host bus at a data rate twice that of the memory chips," the application says.
The design also relies on what's called "pseudo" memory channels and advanced signalling. "The RCD circuit includes a host bus interface and a memory interface coupled to the plurality of memory chips. The RCD circuit implements commands received over the host bus by routing command/address (C/A) signals to the memory chips for providing at least two independently addressable pseudo-channels, the RCD circuit addressing each respective pseudo-channel based on a chip identifier (CID) bit derived from the C/A signals."
If our understanding is correct, it's a little like having a dual-channel memory interface on a single memory DIMM. Whatever, the net result, in practical terms, is a doubling of the headline 6.4 Gbps native dagta rate of DDR5 to fully 12.8 Gbps. Of course, the clever bit is that this is all achieved using existing DDR5 memory chips. A new generation of silicon is not required.
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What is presumably required, on the other hand, are CPUs, chipsets and motherboards to support this new HB-DIMM and that hardly seems like a given. Proprietary memory standards don't have much of a track record when it comes to gaining traction in the PC.
As the patent filing itself says, "most DRAM chips sold today are compatible with various double data rate (DDR) DRAM standards promulgated by the Joint Electron Devices Engineering Council (JEDEC)." For the PC, you can pretty much swap out "most" for "all."
So, the question is what chance this new standard has of being adopted. One obvious route would be to have JEDEC adopt it and make it essentially free to use. It's certainly hard to imagine Intel paying AMD for access. And as much as Intel has been struggling of late, it remains the largest player in PC platforms. So, you'd think Intel would have to be onboard for HB-DIMM to be a goer.

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Jeremy has been writing about technology and PCs since the 90nm Netburst era (Google it!) and enjoys nothing more than a serious dissertation on the finer points of monitor input lag and overshoot followed by a forensic examination of advanced lithography. Or maybe he just likes machines that go “ping!” He also has a thing for tennis and cars.
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