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AMD may be playing chiplet Jenga with its next-gen server chips

AMD CEO Dr. Lisa Su holding an Epyc server chip on stage
(Image credit: AMD)

Here's a glimpse of the future: AMD is said to be working on a datacentre CPU that uses stacked dies, one on top of another, for potentially huge core density or inter-core/memory bandwidth.

Two prominent AMD leakers (@patrickschur_ and @execufix) have posted word of the new chip, known as Milan-X. For reference, Milan is the codename for AMD's latest Epyc server chips, based on the Zen 3 architecture.

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Does that mean Zen 3 will see a stacked revamp sometime in the future, or is the Milan part less of a direct reference to Zen 3 in the datacentre and more so the Epyc chip generation? Rumours suggest Zen 3 will likely play some role in the new stacked chips. 

Either way, it's a seriously exciting prospect, even if it's not destined for our gaming PCs yet. 

I say yet because surely stacked dies will eventually worm into our gaming rigs. It makes sense to crank up capabilities for bandwidth and core counts in datacentres first and foremost with this technology, but with AMD and Intel both looking at 3D stacking technologies it seems inevitable even on desktop.

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The latest Epyc Milan processors offer up to 64 Zen 3 cores, divided between eight compute chiplets and all connected to a central I/O chip. Stacked dies, even fewer of them, could produce much high core counts, if that was indeed the plan and suitably chilled, although Videocardz says its sources are citing the shift as a move to increase bandwidth.

Stacked chips can be much closer to each other than many chips side-by-side, and can be connected up to one another, or other important silicon, inherently through the 3D packaging process, such as with Through Silicon Vias, or TSVs. Thus, more bandwidth is available, and potentially lower latencies between cores and memory, too. 

For the most part, stacked dies tend to be high performance dies over less performance-intensive silicon, but the door is open to further uses and combinations if thermal load can be adequately managed. Heterogenous and mixed-chiplet computing brings about a lot of possibilities with stacking technology.

And what does AMD have to say about this officially? Well, according to CEO Dr. Lisa Su in a recent JP Morgan event transcript: "3D chip stacking is definitely on the roadmap." So that's that.

Intel is also working on innovative packaging technologies, and its Intel Xe HPC chip, Ponte Vecchio, uses multiple 3D stacked (Foveros) dies.

Games tend to favour speed over high core counts or massive bandwidth, but that doesn't mean we're all not keen on even more cores and capability on desktop. Currently the Ryzen 9 5950X tops out at 16 cores, which is alright, I suppose.

There's no 'Silicon Valley' where Jacob grew up, but part of his home country is known as 'The Valleys' and can therefore be easily confused for a happening place in the tech world. From there he graduated to professionally break things and then write about it for cash in the city of Bath, UK.